| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2025-08-05 | [ARM64] Fix lifting of mrs xzr, ... to not reference the xzr register | Mark Rowe | |
| ARM64 lifting replaces references to the zero register with constant zeroes. The zero register is not intended to appear in any lifted IL. In the case of the `mrs` instruction, the destination being a zero register means the system register is accessed only for a side-effect, and is not stored anywhere. The lifting is updated to specify no output registers for the intrinsic in that case. | |||
| 2025-08-01 | Add LogForException APIs to pass stack trace information separate from the ↵ | Rusty Wagner | |
| message | |||
| 2025-07-30 | [CMake] Specify CONFIGURE_DEPENDS for all file(GLOB ..) | Mark Rowe | |
| This ensures that CMake detects when files that match the glob are added or removed. | |||
| 2025-07-30 | [ARM64] Fix lifting of tbz / tbnz for bits >= 32 | Mark Rowe | |
| 2025-07-28 | [PPC] Make assembler.cpp compile over 30 times faster | Mark Rowe | |
| Clang was taking around 30 seconds to compile assembler.cpp on my machine, with most of its time spent in code generation for the global initializer for `lookup`. Changing the map key from `std::string` to `std::string_view` drops compile time to under a second. This is because the compiler no longer has to code gen the allocation, initialization, and moves of 2,100 `std::string`s. `std::string_view` is effectively free to initialize in comparison. While I was here I made the map `static const`. It's not required for the build time improvement, but it is more correct and helped me check that no-one is mutating the map. | |||
| 2025-07-21 | Fix crash on R_MIPS_HI16 relocs caused by bad cast | Brandon Miller | |
| 2025-07-03 | Fix compilation with newer clang/gcc versions | Josh Ferrell | |
| 2025-07-03 | arm/thumb: signal that returns can switch arch | Ryan Snyder | |
| 2025-07-02 | Fix mips tests failing to build on arm64 linux | Mason Reed | |
| 2025-07-02 | Fix thumb2 lifting to prevent temp reg spillover for post dec stm instruction. | Brian Potchik | |
| 2025-07-02 | [mips] Merges PR https://github.com/Vector35/binaryninja-api/pull/6311: MIPS ↵ | kat | |
| r5900 (PS2 EE) support | |||
| 2025-07-02 | Fix misc warnings in PPC disassembler | Mason Reed | |
| 2025-06-30 | [powerpc] Adjust default decoding modes in disassembler.cpp to improve ↵ | Galen Williamson | |
| coverage of instruction table in assembler.cpp | |||
| 2025-06-30 | [x86] Fixes #6628: "sysret should be considered a terminator #6628" by ↵ | Galen Williamson | |
| lifting XED_ICLASS_SYSRET* instructions as returns to RCX | |||
| 2025-06-29 | [powerpc] Full merge of PowerPC disassembler PRs, including: | Galen Williamson | |
| * Remove dependency on capstone for PowerPC disassembly #6292 * Add support for PowerPC VLE instruction set #6740 * Add support for paired-single instructions #6821 * Various post-merge fixes and tweaks to disassembly and lifting * Removal of dependence on capstone for assembler's scoring mechanism (capstone currently disabled, but not removed from codebase yet) | |||
| 2025-06-25 | Fix cxx20 compiler warnings. | Alexander Taylor | |
| 2025-06-25 | Update CXX_STANDARD to 20. | Alexander Taylor | |
| Also update minimum CMake version. | |||
| 2025-06-25 | Remove implicit conversions from Confidence to underlying type, these can ↵ | Rusty Wagner | |
| cause bugs and also issues with C++20 | |||
| 2025-06-09 | [thumb2] Converted MSR system registers into enum | Galen Williamson | |
| 2025-06-09 | WIP improve thumb2 MSR lifting | Galen Williamson | |
| 2025-06-09 | [thumb2] add intrinsics for rbit and clz instructions | Galen Williamson | |
| 2025-06-02 | Add IL for thumb2 CP instructions | jonathanzetier | |
| 2025-06-02 | Update README.md | jonathanzetier | |
| It looks like the build instructions hadn't been updated after the arch plugins were moved back to binaryninja-api. | |||
| 2025-06-02 | ARM64 disassembler: fix MSVC compilation | justanotheranonymoususer | |
| 2025-05-28 | PR #6757: prefer fp, lr for x29, x30 | yrp | |
| arm64: prefer fp, lr arm64: update tests to use new reg names, improve windows build | |||
| 2025-05-28 | Revert "Fix compilation with MSVC: arm64/disassembler/decode_scratchpad.c" | Galen Williamson | |
| This reverts commit cb7c2d3bb716a2e96cf7f127bbf71992a4861907. | |||
| 2025-05-27 | Update decode_scratchpad.c | justanotheranonymoususer | |
| 2025-05-27 | Fix compilation with MSVC: arm64/disassembler/decode_scratchpad.c | justanotheranonymoususer | |
| MSVC shows several warnings, but this one is shown as an error, preventing compilation. | |||
| 2025-05-13 | [yasm] Fix warning for use of deprecated FindPython | Glenn Smith | |
| 2025-05-13 | [CMake] Report compatibility with 3.15 to silence deprecation warnings | Glenn Smith | |
| 2025-05-12 | [Rust] Remove `NonSSAVariant` bound from `LowLevelILFunction` | Mason Reed | |
| We don't do enough with the lifted il != non lifted il to justify the bound. This makes modifying IL much less work as the historical lifted il bound is gone. | |||
| 2025-05-12 | [Rust] Remove unneeded mut from Architecture trait signatures | Mason Reed | |
| These are never expressed, just adds another unneeded constraint on the impl | |||
| 2025-05-12 | [Rust] Support SSA form properly in low level IL | Mason Reed | |
| 2025-05-12 | [Rust] Remove Architecture trait bound on LLIL related structures | Mason Reed | |
| 2025-05-12 | [Rust] Pretty print LLIL sub expressions | Mason Reed | |
| 2025-04-28 | [thumb2] correctly set flags for mov{s} and mvn{s} instruction variants with ↵ | Galen Williamson | |
| 32-bit encodings, addresses #6698 | |||
| 2025-04-24 | mips: fix mips32 linux-syscall cc stack behavior | Ryan Snyder | |
| 2025-04-14 | [powerpc] Fix incorrect disassembly of LIS, ADDIS, ANDI, ANDIS; add assembly ↵ | Galen Williamson | |
| of subis | |||
| 2025-04-09 | [aarch64] add lifting for B.NV instruction, fix branch generation for B.AL ↵ | Galen Williamson | |
| and B.NV, fix AlwaysBranch patching to generate a valid B instruction | |||
| 2025-04-09 | [aarch64] add lifting for B.AL instruction | Galen Williamson | |
| 2025-04-09 | [mips] always show 0 offset in MIPS operands using Register + Offset ↵ | Galen Williamson | |
| Addressing Mode (including when the register r0 is elided) | |||
| 2025-04-09 | Fix capitalization of AArch64. | Alexander Taylor | |
| 2025-04-08 | [aarch64] remove "unknown hint" warning | Galen Williamson | |
| 2025-04-08 | [aarch64] lift all LD[1-4]R? and ST[1-4] opcodes, lift ST/LDCLR, ST/LDEOR, ↵ | Galen Williamson | |
| ST/LDSET, and their variants Also fixes all outstanding issues in arm64test.py, including intrinsics, dc, at, and tlbi | |||
| 2025-04-08 | Omit the branch when lifting xabort | Brandon Miller | |
| When not in RTM, the xabort intrinsic instruction is a NOP. When in RTM, the only way to resolve the branch destination is to resolve the fallback address computed by a seperate xbegin instruction | |||
| 2025-04-01 | [aarch64] use static var to avoid recreation of sysregs vector | Galen Williamson | |
| 2025-03-31 | [aarch64] Updating Aarch64 system registers to 2024-12 spec, fix MSR/MRS ↵ | Galen Williamson | |
| lifting to use ReadMSR/WriteMSR intrinsics that take enums, removing the sysregs from the register list of the architecture * sysregs are no longer registers, add enum for TLBI and AT operands * add erroneously missing cases for unsupported encodings, add enum for DC operands | |||
| 2025-03-28 | missed the older dates! | Jordan Wiens | |
| 2025-03-28 | belated copyright year update | Jordan Wiens | |
| 2025-03-24 | Fix extern ptr corercion for R_MIPS_HIGHEST/HIGHER | Brandon Miller | |
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index : public/binaryninja-api.git | |
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