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2025-07-03Fix compilation with newer clang/gcc versionsJosh Ferrell
2025-07-03arm/thumb: signal that returns can switch archRyan Snyder
2025-07-02Fix mips tests failing to build on arm64 linuxMason Reed
2025-07-02Fix thumb2 lifting to prevent temp reg spillover for post dec stm instruction.Brian Potchik
2025-07-02[mips] Merges PR https://github.com/Vector35/binaryninja-api/pull/6311: MIPS ↵kat
r5900 (PS2 EE) support
2025-07-02Fix misc warnings in PPC disassemblerMason Reed
2025-06-30[powerpc] Adjust default decoding modes in disassembler.cpp to improve ↵Galen Williamson
coverage of instruction table in assembler.cpp
2025-06-30[x86] Fixes #6628: "sysret should be considered a terminator #6628" by ↵Galen Williamson
lifting XED_ICLASS_SYSRET* instructions as returns to RCX
2025-06-29[powerpc] Full merge of PowerPC disassembler PRs, including:Galen Williamson
* Remove dependency on capstone for PowerPC disassembly #6292 * Add support for PowerPC VLE instruction set #6740 * Add support for paired-single instructions #6821 * Various post-merge fixes and tweaks to disassembly and lifting * Removal of dependence on capstone for assembler's scoring mechanism (capstone currently disabled, but not removed from codebase yet)
2025-06-25Fix cxx20 compiler warnings.Alexander Taylor
2025-06-25Update CXX_STANDARD to 20.Alexander Taylor
Also update minimum CMake version.
2025-06-25Remove implicit conversions from Confidence to underlying type, these can ↵Rusty Wagner
cause bugs and also issues with C++20
2025-06-09[thumb2] Converted MSR system registers into enumGalen Williamson
2025-06-09WIP improve thumb2 MSR liftingGalen Williamson
2025-06-09[thumb2] add intrinsics for rbit and clz instructionsGalen Williamson
2025-06-02Add IL for thumb2 CP instructionsjonathanzetier
2025-06-02Update README.mdjonathanzetier
It looks like the build instructions hadn't been updated after the arch plugins were moved back to binaryninja-api.
2025-06-02ARM64 disassembler: fix MSVC compilationjustanotheranonymoususer
2025-05-28PR #6757: prefer fp, lr for x29, x30yrp
arm64: prefer fp, lr arm64: update tests to use new reg names, improve windows build
2025-05-28Revert "Fix compilation with MSVC: arm64/disassembler/decode_scratchpad.c"Galen Williamson
This reverts commit cb7c2d3bb716a2e96cf7f127bbf71992a4861907.
2025-05-27Update decode_scratchpad.cjustanotheranonymoususer
2025-05-27Fix compilation with MSVC: arm64/disassembler/decode_scratchpad.cjustanotheranonymoususer
MSVC shows several warnings, but this one is shown as an error, preventing compilation.
2025-05-13[yasm] Fix warning for use of deprecated FindPythonGlenn Smith
2025-05-13[CMake] Report compatibility with 3.15 to silence deprecation warningsGlenn Smith
2025-05-12[Rust] Remove `NonSSAVariant` bound from `LowLevelILFunction`Mason Reed
We don't do enough with the lifted il != non lifted il to justify the bound. This makes modifying IL much less work as the historical lifted il bound is gone.
2025-05-12[Rust] Remove unneeded mut from Architecture trait signaturesMason Reed
These are never expressed, just adds another unneeded constraint on the impl
2025-05-12[Rust] Support SSA form properly in low level ILMason Reed
2025-05-12[Rust] Remove Architecture trait bound on LLIL related structuresMason Reed
2025-05-12[Rust] Pretty print LLIL sub expressionsMason Reed
2025-04-28[thumb2] correctly set flags for mov{s} and mvn{s} instruction variants with ↵Galen Williamson
32-bit encodings, addresses #6698
2025-04-24mips: fix mips32 linux-syscall cc stack behaviorRyan Snyder
2025-04-14[powerpc] Fix incorrect disassembly of LIS, ADDIS, ANDI, ANDIS; add assembly ↵Galen Williamson
of subis
2025-04-09[aarch64] add lifting for B.NV instruction, fix branch generation for B.AL ↵Galen Williamson
and B.NV, fix AlwaysBranch patching to generate a valid B instruction
2025-04-09[aarch64] add lifting for B.AL instructionGalen Williamson
2025-04-09[mips] always show 0 offset in MIPS operands using Register + Offset ↵Galen Williamson
Addressing Mode (including when the register r0 is elided)
2025-04-09Fix capitalization of AArch64.Alexander Taylor
2025-04-08[aarch64] remove "unknown hint" warningGalen Williamson
2025-04-08[aarch64] lift all LD[1-4]R? and ST[1-4] opcodes, lift ST/LDCLR, ST/LDEOR, ↵Galen Williamson
ST/LDSET, and their variants Also fixes all outstanding issues in arm64test.py, including intrinsics, dc, at, and tlbi
2025-04-08Omit the branch when lifting xabortBrandon Miller
When not in RTM, the xabort intrinsic instruction is a NOP. When in RTM, the only way to resolve the branch destination is to resolve the fallback address computed by a seperate xbegin instruction
2025-04-01[aarch64] use static var to avoid recreation of sysregs vectorGalen Williamson
2025-03-31[aarch64] Updating Aarch64 system registers to 2024-12 spec, fix MSR/MRS ↵Galen Williamson
lifting to use ReadMSR/WriteMSR intrinsics that take enums, removing the sysregs from the register list of the architecture * sysregs are no longer registers, add enum for TLBI and AT operands * add erroneously missing cases for unsupported encodings, add enum for DC operands
2025-03-28missed the older dates!Jordan Wiens
2025-03-28belated copyright year updateJordan Wiens
2025-03-24Fix extern ptr corercion for R_MIPS_HIGHEST/HIGHERBrandon Miller
2025-03-21fix x86 settings text and use proper raw string markerJordan Wiens
2025-03-19Register relocation handlers for KCView typekat
2025-03-06ARMv7: Fix lifting of instructions that use register-shifted registersJosh Ferrell
2025-03-06ARMv7: update test_lift.py and test.pyJosh Ferrell
2025-03-06ARMv7: Add support for register-shifted registersJosh Ferrell
2025-02-13Add licensing check for Rust codeMason Reed
If we add new rust dependencies we should now be alerted when a new license type is added.