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AgeCommit message (Expand)Author
2026-05-22Implement return value location handling for x86/x86_64 ELF ABIRusty Wagner
2026-05-22Initial support for Go and Pascal calling conventionsRusty Wagner
2026-05-22Add handling of structure returns and parameters in Windows x86/x64 calling c...Rusty Wagner
2026-05-22Add handling of structure returns and parameters in aarch64 calling conventionRusty Wagner
2026-05-19Fix Thumb-2 out-of-bounds read during liftingBrandon Miller
2026-05-10[Rust] Refactor `binary_view` moduleMason Reed
2026-04-22[arm64] Update header names in MakefilesfG!
2026-04-15RISC-V: Special handling for 0000 (trap).Alexander Taylor
2026-04-14[aarch64] Fix handling of ARM64_RELOC_GOT_LOAD_PAGEOFF12 and ARM64_RELOC_GOT_...Josh Ferrell
2026-04-13[aarch64] Add support for ARM64_RELOC_BRANCH26, ARM64_RELOC_GOT_LOAD_PAGE21, ...Josh Ferrell
2026-04-13[Thumb2] Fix IT instruction infoJosh Ferrell
2026-03-30Fix compiler warnings seen with Clang 21Mark Rowe
2026-03-27Ensure rounding flag is properly emitted on some x86 floating point instructionsPeter LaFosse
2026-03-23[Swift] Add arm64 calling conventionsMark Rowe
2026-03-06Implement DTPOFF64 and DTPMOD64 relocations.Alexander Taylor
2026-02-27[MachO] Fix relocations from chained fixups not respecting addendsMark Rowe
2026-02-23[x86] Intel APX support (#6423)Avery
2026-02-23[Rust] Fix plugins being referenced in `cargo about` outputMason Reed
2026-02-20Allow calling conventions to specify a list of registers that are required to...Rusty Wagner
2026-02-09Fix outdated object names in AArch64 disassembler MakefilesJon Palmisciano
2026-01-30Update function recognizer to detect ILP32 plt entriesBrandon Miller
2026-01-23Add missing x86_64 relocations.Alexander Taylor
2026-01-23Lifted new PPC insns, MIPS reloc fix.Alexander Taylor
2026-01-23Implement R_386_IRELATIVE relocation handling.Alexander Taylor
2026-01-20swap order for some ppc floating point that were backwardJordan Wiens
2026-01-16Update x86 arch README to remove outdated info.Alexander Taylor
2026-01-12Fix(ppcvle): Correct si_split16 immediate decoding for I16A-form instructionschedahub
2026-01-11[Rust] Enter more session scoped tracing spans for debug info and binary view...Mason Reed
2026-01-11[Rust] Replace `log` with `tracing`Mason Reed
2026-01-01update copyrights for 2026Jordan Wiens
2025-12-29Use session scoped logger instance for unhandled relocation informationMason Reed
2025-12-20Fix many of the warnings that show up when compiling with GCC 15.2Mark Rowe
2025-12-11[MIPS] Don't add a default branch type for jalrBrandon Miller
2025-12-11[MIPS] Mark `jalr[.hb] $zero, $ra` as a return instructionRong "Mantle" Bao
2025-12-10[Rust] Remove `UnusedRegisterStackInfo` and update architecture documentationMason Reed
2025-12-10[Rust] Move architecture module code into more reasonable filesMason Reed
2025-12-08[AArch64] Update system registers based on ARM's 2025-09 dataMark Rowe
2025-12-05[Rust] Do not clean out-of-tree dependencies for incremental buildsMason Reed
2025-12-05[Rust] Fix misc clippy lints and warningsMason Reed
2025-11-17Fix some compiler warningsRusty Wagner
2025-11-05[ARM64] only extend if load is smallyrp
2025-11-03Fix VLE I16L-form instructions to use rD instead of rAchedahub
2025-11-03Fix VLE ANDIx translation to always store result in destination registerchedahub
2025-11-01Fix PPCVLE I16L-form immediate decoding: use 5-bit mask for ui0_4chedahub
2025-10-29Fix(ppc/il): Treat r0 as a register in e_addi/e_add16i ILchedahub
2025-10-29Fix(ppc/spe): Correct source operand parsing for EVX instructionschedahub
2025-10-24aarch64: implements lifting (intrinsics) for LDXP/STXPMaxime Meignan
2025-10-22Fix: PowerPC decode logic for Rx, Ry, Rz registerchedahub
2025-10-22Call SetIgnore on all intrinsic types in x86Peter LaFosse
2025-10-20[AArch64] Lift MTE instructions to intrinsicsMark Rowe