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2026-02-23[Rust] Fix plugins being referenced in `cargo about` outputMason Reed
2026-02-20Allow calling conventions to specify a list of registers that are required ↵Rusty Wagner
to be considered for heuristic calling convention detection
2026-02-09Fix outdated object names in AArch64 disassembler MakefilesJon Palmisciano
2026-01-30Update function recognizer to detect ILP32 plt entriesBrandon Miller
2026-01-23Add missing x86_64 relocations.Alexander Taylor
2026-01-23Lifted new PPC insns, MIPS reloc fix.Alexander Taylor
2026-01-23Implement R_386_IRELATIVE relocation handling.Alexander Taylor
Closes #7851.
2026-01-20swap order for some ppc floating point that were backwardJordan Wiens
2026-01-16Update x86 arch README to remove outdated info.Alexander Taylor
2026-01-12Fix(ppcvle): Correct si_split16 immediate decoding for I16A-form instructionschedahub
2026-01-11[Rust] Enter more session scoped tracing spans for debug info and binary ↵Mason Reed
view callbacks
2026-01-11[Rust] Replace `log` with `tracing`Mason Reed
- Added more documentation - Replaced global named logger for plugins, fixing the issue when the CU has multiple (e.g. statically linked demo) - Simplified some misc code This is a breaking change, but I believe there is no better time to make it, we cannot continue to use the `log` crate, it is too limited for our needs.
2026-01-01update copyrights for 2026Jordan Wiens
2025-12-29Use session scoped logger instance for unhandled relocation informationMason Reed
Ran into this when running over certain object files on ppc, we can do it for all of them though.
2025-12-20Fix many of the warnings that show up when compiling with GCC 15.2Mark Rowe
2025-12-11[MIPS] Don't add a default branch type for jalrBrandon Miller
2025-12-11[MIPS] Mark `jalr[.hb] $zero, $ra` as a return instructionRong "Mantle" Bao
2025-12-10[Rust] Remove `UnusedRegisterStackInfo` and update architecture documentationMason Reed
2025-12-10[Rust] Move architecture module code into more reasonable filesMason Reed
To keep backwards compatibility for commonly referenced code we re-export them within the architecture module. Also does some light refactoring of some newly added APIs to keep them more consistent with other parts of the codebase.
2025-12-08[AArch64] Update system registers based on ARM's 2025-09 dataMark Rowe
This change consists of two parts: 1. Updating the system register enumeration and names based on the latest data from ARM. 2. Removing register names that conflict with the official names from ARM. The conflicting register names came a data set of Apple-specific system register names. These would ideally not be baked into the AArch64 disassembler at all, but would be added by Binary Ninja's Apple platform. The exact mechanism for doing that is still TBD. Fixes https://github.com/Vector35/binaryninja-api/issues/7664.
2025-12-05[Rust] Do not clean out-of-tree dependencies for incremental buildsMason Reed
We already do this for a number of plugins / crates, this commit goes over the rest to make sure that they all do this. We keep cleaning binaryninjacore-sys as we want to generate the core bindings immediately on changes to binaryninjacore.h
2025-12-05[Rust] Fix misc clippy lints and warningsMason Reed
These are introduced after changing to Rust 1.91.1
2025-11-17Fix some compiler warningsRusty Wagner
2025-11-05[ARM64] only extend if load is smallyrp
[ARM64] remove zero extend from ubfx, ubfiz [ARM64] only zero extend fmov when needed arm64: resolve ambiguity Resolves #7307
2025-11-03Fix VLE I16L-form instructions to use rD instead of rAchedahub
2025-11-03Fix VLE ANDIx translation to always store result in destination registerchedahub
2025-11-01Fix PPCVLE I16L-form immediate decoding: use 5-bit mask for ui0_4chedahub
2025-10-29Fix(ppc/il): Treat r0 as a register in e_addi/e_add16i ILchedahub
2025-10-29Fix(ppc/spe): Correct source operand parsing for EVX instructionschedahub
2025-10-24aarch64: implements lifting (intrinsics) for LDXP/STXPMaxime Meignan
2025-10-22Fix: PowerPC decode logic for Rx, Ry, Rz registerchedahub
2025-10-22Call SetIgnore on all intrinsic types in x86Peter LaFosse
2025-10-20[AArch64] Lift MTE instructions to intrinsicsMark Rowe
2025-10-18[AArch64] Lift FEAT_CSSC instructionsMark Rowe
`abs`, `smax`, `smin`, `umax`, and `umin` are lifted to instruction sequences involving comparisons, while `cnt` and `ctz` are lifted to intrinsics.
2025-10-15[AArch64] Update disassembler based on 2025-09 ARM ISA dataMark Rowe
2025-10-03Disable mpx mode in x86 as its been discontinued since 2019Peter LaFosse
2025-09-25[AArch64] Update disassembler based on 2025-06 ARM ISA dataMark Rowe
Alongside this I also added support for decoding: * LDR / STR (table) * PMULLB / PMULLT * ABS / CNT / CTZ * SMIN / SMAX / UMIN / UMAX * RPRFM * PSEL Note that while these instructions will now be disassembled, they are not yet lifted to LLIL. Additionally, I fixed a number of errors in the decoding of some less commonly occurring instructions.
2025-09-22[armv7] Add support for R_ARM_PC24 relocationNick Shipp
2025-09-18fix ldrsw lift to sign extend in certain encodingsyrp
2025-09-11Add Apple arm64 syscall calling convention to Apple's platformsmostobriv
2025-09-08[aarch64] Enable Always and Never Branch patching for TBZ/TBNZ and CBZ/CBNZGalen Williamson
2025-08-20[Rust] Misc formatting fixesMason Reed
2025-08-14[Mac] Consistently specify rpaths for plug-insMark Rowe
C++ plug-ins now consistently use the `plugin_rpath` or `ui_plugin_rpath` macros to ensure they have `SKIP_BUILD_RPATH` set when building on Mac (i.e., no `LC_RPATH` is added). Rust plug-ins have their build.rs updated to only specify `-Wl,-rpath` when building for Linux. It is not needed on macOS. On macOS we instead explicitly specify an `@rpath`-relative install name. This doesn't change any behavior, but avoids leaving an absolute path as the library's install name and is consistent with CMake's behavior for C++ plug-ins.
2025-08-14[thumb2] silence parentheses-equality warnings when compiling generated ↵Galen Williamson
thumb2 disassembler
2025-08-14[armv7] add explicit signedness to conversions for scalar forms of VCVTGalen Williamson
2025-08-14[thumb2] improved disassembly and lifting of VCVT instruction for scalar ↵Galen Williamson
floating-point/integer cases
2025-08-14Corrected python docstring for LowLevelILFunction.float_convertGalen Williamson
[thumb2] removed redundant format suffixes from disassembly of VFP instruction [thumb2] Corrected lifting of VCVT instruction
2025-08-14[armv7] Add lifting for VCVT floating-point scalar variantsGalen Williamson
2025-08-14[thumb2] Updated thumb2 disassembler generator to use Tatsu-generated parser ↵Galen Williamson
instead of deprecated Grako
2025-08-14[armv7/thumb2] Fix Lifting for PC-relative vldr instruction does not align ↵Galen Williamson
PC when calculating address #6947 Updated thumb2 pcode parser used by disassembler generator to use Tatsu instead of deprecated Grako