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2025-11-01Fix PPCVLE I16L-form immediate decoding: use 5-bit mask for ui0_4chedahub
2025-10-29Fix(ppc/il): Treat r0 as a register in e_addi/e_add16i ILchedahub
2025-10-29Fix(ppc/spe): Correct source operand parsing for EVX instructionschedahub
2025-10-24aarch64: implements lifting (intrinsics) for LDXP/STXPMaxime Meignan
2025-10-22Fix: PowerPC decode logic for Rx, Ry, Rz registerchedahub
2025-10-22Call SetIgnore on all intrinsic types in x86Peter LaFosse
2025-10-20[AArch64] Lift MTE instructions to intrinsicsMark Rowe
2025-10-18[AArch64] Lift FEAT_CSSC instructionsMark Rowe
2025-10-15[AArch64] Update disassembler based on 2025-09 ARM ISA dataMark Rowe
2025-10-03Disable mpx mode in x86 as its been discontinued since 2019Peter LaFosse
2025-09-25[AArch64] Update disassembler based on 2025-06 ARM ISA dataMark Rowe
2025-09-22[armv7] Add support for R_ARM_PC24 relocationNick Shipp
2025-09-18fix ldrsw lift to sign extend in certain encodingsyrp
2025-09-11Add Apple arm64 syscall calling convention to Apple's platformsmostobriv
2025-09-08[aarch64] Enable Always and Never Branch patching for TBZ/TBNZ and CBZ/CBNZGalen Williamson
2025-08-20[Rust] Misc formatting fixesMason Reed
2025-08-14[Mac] Consistently specify rpaths for plug-insMark Rowe
2025-08-14[thumb2] silence parentheses-equality warnings when compiling generated thumb...Galen Williamson
2025-08-14[armv7] add explicit signedness to conversions for scalar forms of VCVTGalen Williamson
2025-08-14[thumb2] improved disassembly and lifting of VCVT instruction for scalar floa...Galen Williamson
2025-08-14Corrected python docstring for LowLevelILFunction.float_convertGalen Williamson
2025-08-14[armv7] Add lifting for VCVT floating-point scalar variantsGalen Williamson
2025-08-14[thumb2] Updated thumb2 disassembler generator to use Tatsu-generated parser ...Galen Williamson
2025-08-14[armv7/thumb2] Fix Lifting for PC-relative vldr instruction does not align PC...Galen Williamson
2025-08-05[ARM64] Fix lifting of mrs xzr, ... to not reference the xzr registerMark Rowe
2025-08-01Add LogForException APIs to pass stack trace information separate from the me...Rusty Wagner
2025-07-30[CMake] Specify CONFIGURE_DEPENDS for all file(GLOB ..)Mark Rowe
2025-07-30[ARM64] Fix lifting of tbz / tbnz for bits >= 32Mark Rowe
2025-07-28[PPC] Make assembler.cpp compile over 30 times fasterMark Rowe
2025-07-21Fix crash on R_MIPS_HI16 relocs caused by bad castBrandon Miller
2025-07-03Fix compilation with newer clang/gcc versionsJosh Ferrell
2025-07-03arm/thumb: signal that returns can switch archRyan Snyder
2025-07-02Fix mips tests failing to build on arm64 linuxMason Reed
2025-07-02Fix thumb2 lifting to prevent temp reg spillover for post dec stm instruction.Brian Potchik
2025-07-02[mips] Merges PR https://github.com/Vector35/binaryninja-api/pull/6311: MIPS ...kat
2025-07-02Fix misc warnings in PPC disassemblerMason Reed
2025-06-30[powerpc] Adjust default decoding modes in disassembler.cpp to improve covera...Galen Williamson
2025-06-30[x86] Fixes #6628: "sysret should be considered a terminator #6628" by liftin...Galen Williamson
2025-06-29[powerpc] Full merge of PowerPC disassembler PRs, including:Galen Williamson
2025-06-25Fix cxx20 compiler warnings.Alexander Taylor
2025-06-25Update CXX_STANDARD to 20.Alexander Taylor
2025-06-25Remove implicit conversions from Confidence to underlying type, these can cau...Rusty Wagner
2025-06-09[thumb2] Converted MSR system registers into enumGalen Williamson
2025-06-09WIP improve thumb2 MSR liftingGalen Williamson
2025-06-09[thumb2] add intrinsics for rbit and clz instructionsGalen Williamson
2025-06-02Add IL for thumb2 CP instructionsjonathanzetier
2025-06-02Update README.mdjonathanzetier
2025-06-02ARM64 disassembler: fix MSVC compilationjustanotheranonymoususer
2025-05-28PR #6757: prefer fp, lr for x29, x30yrp
2025-05-28Revert "Fix compilation with MSVC: arm64/disassembler/decode_scratchpad.c"Galen Williamson