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AgeCommit message (Expand)Author
2026-02-23[Rust] Fix plugins being referenced in `cargo about` outputMason Reed
2026-02-20Allow calling conventions to specify a list of registers that are required to...Rusty Wagner
2026-02-09Fix outdated object names in AArch64 disassembler MakefilesJon Palmisciano
2026-01-30Update function recognizer to detect ILP32 plt entriesBrandon Miller
2026-01-23Add missing x86_64 relocations.Alexander Taylor
2026-01-23Lifted new PPC insns, MIPS reloc fix.Alexander Taylor
2026-01-23Implement R_386_IRELATIVE relocation handling.Alexander Taylor
2026-01-20swap order for some ppc floating point that were backwardJordan Wiens
2026-01-16Update x86 arch README to remove outdated info.Alexander Taylor
2026-01-12Fix(ppcvle): Correct si_split16 immediate decoding for I16A-form instructionschedahub
2026-01-11[Rust] Enter more session scoped tracing spans for debug info and binary view...Mason Reed
2026-01-11[Rust] Replace `log` with `tracing`Mason Reed
2026-01-01update copyrights for 2026Jordan Wiens
2025-12-29Use session scoped logger instance for unhandled relocation informationMason Reed
2025-12-20Fix many of the warnings that show up when compiling with GCC 15.2Mark Rowe
2025-12-11[MIPS] Don't add a default branch type for jalrBrandon Miller
2025-12-11[MIPS] Mark `jalr[.hb] $zero, $ra` as a return instructionRong "Mantle" Bao
2025-12-10[Rust] Remove `UnusedRegisterStackInfo` and update architecture documentationMason Reed
2025-12-10[Rust] Move architecture module code into more reasonable filesMason Reed
2025-12-08[AArch64] Update system registers based on ARM's 2025-09 dataMark Rowe
2025-12-05[Rust] Do not clean out-of-tree dependencies for incremental buildsMason Reed
2025-12-05[Rust] Fix misc clippy lints and warningsMason Reed
2025-11-17Fix some compiler warningsRusty Wagner
2025-11-05[ARM64] only extend if load is smallyrp
2025-11-03Fix VLE I16L-form instructions to use rD instead of rAchedahub
2025-11-03Fix VLE ANDIx translation to always store result in destination registerchedahub
2025-11-01Fix PPCVLE I16L-form immediate decoding: use 5-bit mask for ui0_4chedahub
2025-10-29Fix(ppc/il): Treat r0 as a register in e_addi/e_add16i ILchedahub
2025-10-29Fix(ppc/spe): Correct source operand parsing for EVX instructionschedahub
2025-10-24aarch64: implements lifting (intrinsics) for LDXP/STXPMaxime Meignan
2025-10-22Fix: PowerPC decode logic for Rx, Ry, Rz registerchedahub
2025-10-22Call SetIgnore on all intrinsic types in x86Peter LaFosse
2025-10-20[AArch64] Lift MTE instructions to intrinsicsMark Rowe
2025-10-18[AArch64] Lift FEAT_CSSC instructionsMark Rowe
2025-10-15[AArch64] Update disassembler based on 2025-09 ARM ISA dataMark Rowe
2025-10-03Disable mpx mode in x86 as its been discontinued since 2019Peter LaFosse
2025-09-25[AArch64] Update disassembler based on 2025-06 ARM ISA dataMark Rowe
2025-09-22[armv7] Add support for R_ARM_PC24 relocationNick Shipp
2025-09-18fix ldrsw lift to sign extend in certain encodingsyrp
2025-09-11Add Apple arm64 syscall calling convention to Apple's platformsmostobriv
2025-09-08[aarch64] Enable Always and Never Branch patching for TBZ/TBNZ and CBZ/CBNZGalen Williamson
2025-08-20[Rust] Misc formatting fixesMason Reed
2025-08-14[Mac] Consistently specify rpaths for plug-insMark Rowe
2025-08-14[thumb2] silence parentheses-equality warnings when compiling generated thumb...Galen Williamson
2025-08-14[armv7] add explicit signedness to conversions for scalar forms of VCVTGalen Williamson
2025-08-14[thumb2] improved disassembly and lifting of VCVT instruction for scalar floa...Galen Williamson
2025-08-14Corrected python docstring for LowLevelILFunction.float_convertGalen Williamson
2025-08-14[armv7] Add lifting for VCVT floating-point scalar variantsGalen Williamson
2025-08-14[thumb2] Updated thumb2 disassembler generator to use Tatsu-generated parser ...Galen Williamson
2025-08-14[armv7/thumb2] Fix Lifting for PC-relative vldr instruction does not align PC...Galen Williamson